Endicott Interconnect Technologies Enhances State-of-the-Art HyperBGA® Semiconductor Package Product Line ENDICOTT, NY

HyperBGA® Semiconductor Package Delivers Higher Speeds, Better Reliability Than Ceramic BGAs

Endicott Interconnect Technologies (EI) announced improved capabilities of HyperBGA® PTFE-based “coreless” semiconductor package. Now packing more power and density with the addition of signal layers, HyperBGA® enables semiconductor devices to run at extremely high speeds. The combination of the low loss, low dielectric constant material and strip line cross sections enable digital signal speeds surpassing 12 Gb/s, delivering superior electrical performance.

HyperBGA® offers the longest flip chip BGA life available and outperforms ceramic BGA packages by delivering up to 10 times the reliability. The material compliance of the PTFE material enables this major difference by eliminating the BGA wear out, die cracking, delamination or flip chip bump fatigue seen in other packages. These characteristics provide reliable performance that translates into extended life for large die and system-in-packages (SiP) for mission critical applications.

“Due to increased customer interest in both single-chip and SiP offerings, we continue to fund the development of our HyperBGA® product line, increasing wiring density and layer count for both digital and RF designs. We are also replacing the outer dielectric with a domestically produced material, which further strengthens EI’s ability to provide total packaging solutions,” stated Rajinder Rai, VP of EI’s Microelectronics Division.

HyperBGA® is assembled using standard SMT processes and materials, making columns or land grid array sockets unnecessary. It is capable of flip chip, SMT or CSP component attach on both sides. Functional module testing is now available and HyperBGA® is lead free assembly compatible.

The HyperBGA® product line is an excellent solution for networking, high end server, telecommunications, aerospace, military and medical applications where speed, reliability and increased signal I/O, along with reduced size, weight and power (SWaP) are critical. This low stress flip chip laminate package is also ideally suited for multi-layer, RF, chip-on-flex or any application requiring a SiP approach.